cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 1/8 MTB5D0P03FP cystek product specification p-channel enhancement mode power mosfet MTB5D0P03FP bv dss -30v i d @ v gs =-10v, t c =25 c -56a r ds(on) @v gs =-10v, i d =-25a 4.2m (typ) r ds(on) @v gs =-4.5v, i d =-10a features ? single drive requirement ? low on-resistance ? fast switching characteristic ? pb-free lead plating package symbol outline to-220fp MTB5D0P03FP 4.8m (typ) g d s g gate d drain s source ordering information device package shipping to-220fp MTB5D0P03FP-0-ub-s (pb-free lead plating package) 50 pcs/tube, 20 tubes/box, 4 boxes / carton environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ub : 50 pcs / tube, 20 tubes/box product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 2/8 MTB5D0P03FP cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -30 gate-source voltage v gs 20 v continuous drain current @v gs =-10v, t c =25 c (package limited) -56 continuous drain current @v gs =-10v, t c =25 c (silicon limited) -72 continuous drain current @v gs =-10v, t c =100 c i d -45.5 continuous drain current @v gs =-10v, t a =25 c (note 2) -12.9 continuous drain current @v gs =-10v, t a =70 c (note 2) i dsm -10.3 pulsed drain current (note 4) i dm -288 a t c =25 (note 1) 62.5 t c =100 (note 1) p d 25 t a =25 (note 2) 2 power dissipation t a =70 (note 2) p dsm 1.3 w single pulse avalanche energy @l=0.5mh, i as =-30a (note 3) e as 225 * mj single pulse avalanche current (note 3) i as -30 a operating junction and storage temperature tj, tstg -55~+150 c * 100% uis testing in condition of v d =-15v, l=0.5mh, v g =10v, i as =-20a, rated v ds =-30v thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2 thermal resistance, junction-to-ambient, max, t 10s (note 1) 15 thermal resistance, junction-to-ambient, max (note 1) r th,j-a 62.5 c/w note : 1 . the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and is more useful in setting the upper di ssipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user?s specific board design. 3 . pulse width limited by junction temperature t j(max) =150 c. 4. pulse width 300 s pulses and duty cycle 0.5%. 5. the r ja is the sum of thermal resistance from junction to case r jc and case to ambient.
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 3/8 MTB5D0P03FP cystek product specification characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -30 - - v gs =0v, i d =-250 a v gs(th) -1.0 - -2.5 v v ds = v gs , i d =-250 a g fs - 62 - s v ds =-5v, i d =-25a i gss - - 100 na v gs = 20v - - -1 v ds =-30v, v gs =0v i dss - - -25 a v ds =-30v, v gs =0v, tj=70 c - 4.2 5.5 v gs =-10v, i d =-25a *r ds(on) - 4.8 7.5 m v gs =-4.5v, i d =-10a dynamic *qg - 121 181 *qgs - 18.6 - *qgd - 24.5 - nc i d =-25a, v ds =-24v, v gs =-10v *t d(on) - 19.4 29 *tr - 21.6 32 *t d(off) - 133 200 *t f - 49.2 74 ns v ds =-15v, v gs =-10v, r g =2.7 , i d =-25a ciss - 6290 - coss - 761 - crss - 375 - pf v gs =0v, v ds =-25v, f=1mhz source-drain diode *i s - - -56 a *v sd - -0.83 -1.2 v i s =-25a, v gs =0v *trr - 26 40 ns *qrr - 17 - nc i f =-25a, v gs =0v, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 4/8 MTB5D0P03FP cystek product specification typical characteristics typical output characteristics 0 20 40 60 80 100 120 140 160 180 200 01234 5 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v 10v,9v, 8v, 7v, 6v, 5v 4 .5 v -v ds , drain-source voltage(v) -i d , drain current(a) 4 v 3 .5v -v gs =3v static drain-source on-state resistance vs drain current 1 10 100 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) -10v -4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 5 10 15 20 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 5 10 15 20 25 30 35 40 45 50 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-10v, i d =-25a r ds( on) @tj=25c : 4.2m -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =-25a
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 5/8 MTB5D0P03FP cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(th) , normalized threshold voltage i d =-250 a i d =-1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 -i d , drain current(a) g fs , forward transfer admittance(s) v ds =-5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 20 40 60 80 100 120 140 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-25a v ds =-24v forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 -i d , drain current(a) g fs , forward transfer admittance(s) v ds =-5v pulsed ta=25c maximum drain current vs casetemperature 0 10 20 30 40 50 60 70 80 90 25 50 75 100 125 150 175 t c , case temperature(c) -i d , maximum drain current(a) v gs =-10v, r jc =2c/w limited by package silicon limit
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 6/8 MTB5D0P03FP cystek product specification typical characteristics(cont.) single pulse maximum power dissipation 10 100 1000 10000 1e-05 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) peak transient power (w) t j(max) =150c t c =25c r jc =2c/w typical transfer characteristics 0 20 40 60 80 100 120 140 160 180 200 0246810 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v transient thermal response curves 0.001 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) z jc (t), thermal response single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t1/t2 3.t jm -t c =p dm *r jc (t) 4.r jc =2c/w
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 7/8 MTB5D0P03FP cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds 183 c 60-150 seconds time maintained above: ? temperature (t l ) 217 c ? time (t l ) 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c965fp issued date : 2015.07.20 revised date : 2015.07.21 page no. : 8/8 MTB5D0P03FP cystek product specification to-220fp dimension *typical inches millimeters inches millimeters dim min. max. min. max. marking: dim min. max. min. max. a 0.171 0.183 4.35 4.65 g 0.246 0.258 6.25 6.55 a1 0.051 ref 1.300 ref h 0.138 ref 3.50 ref a2 0.112 0.124 2.85 3.15 h1 0.055 ref 1.40 ref a3 0.102 0.110 2.60 2.80 h2 0.256 0.272 6.50 6.90 b 0.020 0.030 0.50 0.75 j 0.031 ref 0.80 ref b1 0.031 0.041 0.80 1.05 k 0.020 0.50 ref b2 0.047 ref 1.20 ref l 1.102 1.118 28.00 28.40 c 0.020 0.030 0.500 0.750 l1 0.043 0.051 1.10 1.30 d 0.396 0.404 10.06 10.26 l2 0.036 0.043 0.92 1.08 e 0.583 0.598 14.80 15.20 m 0.067 ref 1.70 ref e 0.100 * 2.54* n 0.012 ref 0.30 ref f 0.106 ref 2.70 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . style: pin 1.gate 2.drain 3.source 3-lead to-220fp plastic package cystek package code: fp date code device name b5d0 p03
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